Projects

Designed a wideband, DC-coupled active probe using an op-amp amplifier topology with a tuned compensation network. High-speed PCB uses controlled impedance routing and minimized parasitics to extend bandwidth to 1 GHz.

Systematic investigation of amplifier topologies for electrostatic headphone driving. Designed and simulated compensation networks for stability, and validated boost converter power delivery under various load conditions using PSpice.

Zero-IF digital receiver implemented on FPGA with vectoring and rotation CORDIC blocks for quadrature down-conversion, envelope detection, and phase/magnitude extraction. Includes complex mixing, low-pass filtering, and sample decimation with full HDL testbench validation.